Automatic generation for analog models is not a dream; it’s a reality! MODELZEN™ is an automatic model generator for analog circuits that can translate any circuit into an equivalent SystemVerilog model using XMODEL™ primitives.
Quick and Correct-by-Construction Analog Model Generation
Basically, MODELZEN™ generates structural models of given circuits, leveraging the circuit-level simulation capability of XMODEL™.
In other words, MODELZEN™ builds models by first characterizing the individual devices composing the circuits and then connecting the resulting device models mimicking the topology of the original circuits.
This approach does not require any understanding on the circuits’ functionality and guarantees correct-by-construction models.
Furthermore, the generated models run fast with the XMODEL™’s event-driven simulation. With MODELZEN™, you can get your full-chip models ready in just a few hours!
No Analog Expertise Required!
With MODELZEN™, you don’t need to be an analog expert to create high-fidelity models for analog circuits.
Thanks to MODELZEN™’s structural modeling approach, a verification engineer can generate models for system-level verification without asking for help from the circuit designer.
Also, a circuit designer can effortlessly refresh his/her models whenever the circuits are updated.
Create Models with a Mouse Click!
When you use MODELZEN™ with GLISTER™, you can auto-generate models directly from Cadence® Virtuoso® schematics just with a mouse click!
GLISTER™ streamlines the preparation steps of model generation including netlist generation and property exporting and imports the generated models back into the design database and maintains them up-to-date.