We are all in difficult times, and our way to fight the disease is to help you design and verify your chips easier and better. Check out how to perform fast analog/mixed-signal verification in SystemVerilog with auto-generated models using XMODEL, GLISTER, and MODELZEN at the upcoming virtual DAC 2020!
XMODEL enables fast and accurate simulation of analog/mixed-signal systems entirely in SystemVerilog.
GLISTER lets you build top-down analog models in schematic forms without writing codes.
MODELZEN automatically generates bottom-up analog models from your circuit schematics or netlists.
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