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Meet our experts at DVCon U.S. 2026 and learn why XMODEL, GLISTER, and MODELZEN make the best way to verify your chip designs containing both analog and digital circuits.

• March 3-4, 2026 @ Hyatt Regency Santa Clara
• Booth: #103

With XMODEL, you can model analog circuits in SystemVerilog and run fast, event-driven simulations along with UVM testbenches. Build top-down models effortlessly with GLISTER, generate bottom-up models automatically with MODELZEN, and validate their equivalence with EQCHECK. Together, they provide the best way to verify your next mixed-signal SoC entirely in SystemVerilog.