October 27th, 2023

Meet XMODEL at DVCon Europe 2023

Scientific Analog is coming to Munich! Find out how analog verification in SystemVerilog can become so joyful with XMODEL.

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July 27th, 2023

Scientific Analog proudly sponsors ASP-DAC 2024

June 30th, 2023

Meet XMODEL at DAC 2023

June 2nd, 2023

Webinar on UCIe PHY Modeling and Simulation with XMODEL

February 14th, 2023

Join Scientific Analog at DVCon U.S. 2023

January 28th, 2023

Scientific Analog Sponsors a Tutorial on Writing UVM Testbenches for AMS Circuits at DVCon US 2023

January 28th, 2023

Seoul National University Presents a UVM Reactive Testbench for Measuring Jitter Tolerance of High-Speed Wireline Receivers

January 25th, 2023

Founder of Scientific Analog Talks on the Art of Linear Analysis at ISSCC 2023

January 15th, 2023

Jaeha Kim Presents CMOS Image Sensor Modeling with XMODEL at ASP-DAC 2023

December 26th, 2022

Scientific Analog Wishes A Very Merry New Year to You!

November 29th, 2022

Meet XMODEL at DVCon Europe 2022

November 28th, 2022

Seoul National University to Present a UVM SystemVerilog Testbench for 5G/LTE Multi-Standard RF Transceiver

October 12th, 2022

Seoul National University Team Wins SK Hynix Special Award at 2022 Korea Semiconductor Design Challenge

July 12th, 2022

Scientific Analog proudly sponsors the CDC Best Design and Poster Awards at the 2022 IDEC Congress

June 22nd, 2022

Meet XMODEL at DAC 2022 and Have a Coffee on Us!

May 24th, 2022

Webinar on Writing UVM/SystemVerilog Testbenches for Analog/Mixed-Signal Verification

May 23rd, 2022

Researchers at the Chinese Academy of Sciences Publish Another 50-Gb/s PAM4 Silicon Photonic Transmitter and CDR Designed with XMODEL

April 18th, 2022

Jaeha Kim Talks on Efficient Analog/Mixed-Signal Simulation in SystemVerilog with Auto-Generated Models at CICC 2022

February 17th, 2022

Meet Scientific Analog at DVCon U.S. 2022

January 18th, 2022

Scientific Analog Joins Accellera

January 10th, 2022

Charles Dancak Presents UVM Testbench for AMS Verification at DVCon U.S. 2022

December 20th, 2021

Happy Holidays!

November 10th, 2021

Time to Meet XMODEL at DAC 2021

November 10th, 2021

XMODEL Gets on Board with Rescale

September 3rd, 2021

Webinar on Auto-Generating SystemVerilog Models from Analog/Mixed-Signal Circuits

June 28th, 2021

Seoul National University Presents XMODEL/SystemVerilog Models of 5G RF Transceiver at SMACD 2021

June 8th, 2021

Webinar on Writing OOP-Style SystemVerilog Testbenches for Analog IPs

February 19th, 2021

Meet XMODEL at DVCON U.S. 2021

December 14th, 2020

Seoul National University to Present the XMODEL/SystemVerilog Models of High-Density DRAM Arrays and Nonlinear RF Amplifiers at DVCON U.S. 2021

December 12th, 2020

Next Year, We’ll Fly Again!

September 30th, 2020

Founder of Scientific Analog to Give Tutorial on Silicon Photonics Modeling at 2020 IEEE Asian Solid-State Circuits Conference

September 9th, 2020

Scientific Analog to Present 5G RF Transceiver Models with XMODEL at 20th RF/Analog Circuit Workshop, Korea

September 1st, 2020

Seoul National University and Samsung Electronics to Present XMODEL-based Verification Framework for NAND Flash Memory Sensing Systems at ICCAD 2020

August 5th, 2020

Scientific Analog Joins Mentor Graphics vReady Program

May 30th, 2020

Meet XMODEL at Virtual DAC Crossing 2020

April 6th, 2020

Scientific Analog and BetaSoft Consulting Team Up for XMODEL Distribution in North America

April 3rd, 2020

Beijing Oplan Technologies Distributes XMODEL in China

March 6th, 2020

Chinese Researchers Publish a 50-Gb/s PAM4 Silicon Photonic Transmitter and CDR Designed with XMODEL

February 27th, 2020

XMODEL Meets Silicon Photonics

February 1st, 2020

Scientific Analog Becomes the Member of Si2 OpenAccess Coalition

December 17th, 2019

Wishing You A Very Merry XMODEL

September 9th, 2019

Scientific Analog Presents at JEDAT EDA Partner Seminar 2019 in Tokyo, Japan

August 30th, 2019

Scientific Analog Proudly Sponsors 19th RF/Analog Circuit Workshop, Jeju, Korea

March 25th, 2019

Increase your winning odds with XMODEL / DAC 2019

December 12th, 2018

Wishing You A Great Year Ahead

April 19th, 2018

SK Hynix to Present DRAM Verification Flow Based on XMODEL at DAC 2018 Designer Track

April 2nd, 2018

Founder of Scientific Analog to Present at Stanford’s SystemX Design Productivity Workshop

March 31st, 2018

GLISTER-ADE Integration Released

March 30th, 2018

Meet XMODEL at DAC 2018

December 15th, 2017

Season’s Greetings

June 26th, 2017

Scientific Analog joins Synopsys VC Apps Access Program

June 22nd, 2017

Gary Smith EDA selects Scientific Analog as “What to See at DAC 2017”

April 20th, 2017

XMODEL is coming to DAC 2017

December 20th, 2016

Happy Holidays!

October 17th, 2016

Scientific Analog joins Cadence Connections EDA Program

October 16th, 2016

Jedat distributes XMODEL in Japan

October 4th, 2016

Seoul National University and IDEC distributes Analog Cell Library (ACL) in 65nm CMOS

July 11th, 2016

Scientific Analog announces distribution agreement with Incusolution

May 31st, 2016

Come and see XMODEL at DAC 2016

June 15th, 2015

Scientific Analog Donates XMODEL to Korean Universities

June 14th, 2015

XMODEL’s First Debut at DAC 2015