August 2025

Technical Paper

Validation of Analog ReRAM-Based PIM with Non-Idealities Using SystemVerilog

This DVCon Japan paper presents a statistical approach to estimate how much the accuracy of a ReRAM-based PIM degrades in the presence of variations. Learn more

Q&A of the Month

Can GLISTER netlist model schematics with Real-Number Model (RNM) ports?

Yes, GLISTER can support RNM nettypes, such as 'wreal4state', 'wrealsum', 'wrealavg', and more. Learn more

Tip of the Month

Mapping global symbols from 'analogLib' to custom SystemVerilog signals

This tip shows how to redirect the 'vcc' symbol from 'XMODEL_global.vcc' to a custom signal, e.g., 'my_global.vcc'. Learn more

Primitive of the Month

xreal_to_real

This primitive converts an xreal-type signal to a real-type signal, using fixed or variable time steps with piecewise-linear or constant approximation. Learn more