Upcoming Event
Meet Scientific Analog at DVCon U.S. 2022
Meet our experts on verifying analog circuits in SystemVerilog/UVM!
Meet our experts on verifying analog circuits in SystemVerilog/UVM!
Seeing is believing! Witness how easy it is to auto-extract models from circuits using MODELZEN.
This primitive can produce digital pulses with periodic or arbitrary waveforms.
Learn how to utilize the new feature of 'pulse_gen' primitive to generate digital pulses with irregular waveforms.
Meet Diana, Scientific Analog's AI Booth Specialist at DAC 2026!
Verifying NPUs with CIM, Optimizing Transmit Equalizers, and More
Estimating Eye Openings and FFE/DFE Settings from Channel SBR
Delay, Delay, Delay!
EQCHECK, Adaptive Decision-Feedback Equalizer, and More