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Meet our experts in person and learn why XMODEL is the best way to verify analog circuits in SystemVerilog!
This application note models the duty-cycle corrector presented by James S. Humble, et al., in their 2006 ISSCC paper.
Check out how to dump the time instants of the clock's transition edges into a text file for post-processing.
This primitive measures the time of each input event being triggered.
This release improves the XMODEL's stability of circuit-level simulation and the MODELZEN support for CDL-format netlists.
Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More
Catching Elusive Voltage Spikes with Assertions, Modeling VCO with Extra Digital Inputs, and More
Modeling Delta-Sigma Digital-to-Analog Converters, XMODEL at DVCon US, and More
Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More
Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More