July 2022

Webinar on Demand

Writing UVM/SystemVerilog testbenches for analog/mixed-signal verification

Missed this webinar? Watch this video recording and learn how to write UVM testbenches for analog circuits.

Model of the Month

Modeling CMOS image sensor with sub-pixel architecture

This application note models the CMOS image sensor using sub-pixel architecture, recently published by Yorito Sakano, et al., at ISSCC 2020.

Tip of the Month

Fixing the values of certain digital mode inputs of a UDM

Learn simple mode specification expressions that can fix the values of unused digital mode bits of a UDM.

Primitive of the Month

switch

This primitive models an ideal switch with on and off resistances.

Latest Issues

June 2026

Verifying NPUs with CIM, Optimizing Transmit Equalizers, and More

May 2026

Estimating Eye Openings and FFE/DFE Settings from Channel SBR

April 2026

Delay, Delay, Delay!

March 2026

EQCHECK, Adaptive Decision-Feedback Equalizer, and More

February 2026

XMODEL at DVCon US, Introducing EQCHECK, and More