March 2021

Article of the Month

SystemVerilog OOP Testbench for Analog Filter: A Tutorial (Part 2)

This second part of the article describes how to write an OOP-style SystemVerilog testbench that generates randomized test sequences, check analog assertions, and report coverages for an analog circuit with multiple operating modes.

Feature of the Month

XMODEL Introduction

New to XMODEL? Get up to speed by watching this latest video introducing XMODEL, GLISTER, and MODELZEN.

Tip of the Month

Modeling power-supply induced jitter (PSIJ) effects in clock buffer chains

Learn how to model the PSIJ effects in a clock distribution network with a 'delay_to_clk' primitive and measure its frequency characteristics using a 'probe_ac' primitive.

XMODEL Release Updates

2021.03 Release

This release adds many improvements and bug fixes including the MODELZEN support for unpacked arrays of 'xbit' and 'xreal' signals and a property for grouping auxiliary instances with the main instance.

Latest Issues

March 2025

Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More

February 2025

Catching Elusive Voltage Spikes with Assertions, Modeling VCO with Extra Digital Inputs, and More

January 2025

Modeling Delta-Sigma Digital-to-Analog Converters, XMODEL at DVCon US, and More

December 2024

Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More

November 2024

Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More