March 2021

Article of the Month

SystemVerilog OOP Testbench for Analog Filter: A Tutorial (Part 2)

This second part of the article describes how to write an OOP-style SystemVerilog testbench that generates randomized test sequences, check analog assertions, and report coverages for an analog circuit with multiple operating modes.

Feature of the Month

XMODEL Introduction

New to XMODEL? Get up to speed by watching this latest video introducing XMODEL, GLISTER, and MODELZEN.

Tip of the Month

Modeling power-supply induced jitter (PSIJ) effects in clock buffer chains

Learn how to model the PSIJ effects in a clock distribution network with a 'delay_to_clk' primitive and measure its frequency characteristics using a 'probe_ac' primitive.

XMODEL Release Updates

2021.03 Release

This release adds many improvements and bug fixes including the MODELZEN support for unpacked arrays of 'xbit' and 'xreal' signals and a property for grouping auxiliary instances with the main instance.

Latest Issues

July 2025

Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More

June 2025

Measuring Open-Loop Transfer Function of DC-DC Converter, Extracting Charge-Pump Converter Models, and More

May 2025

XMODEL at DAC 2025, Modeling an Asynchronous SAR-ADC, and More

April 2025

Modeling NAND Flash Memory, Measuring Comparator's Offset, and More

March 2025

Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More