Upcoming Event
Meet Scientific Analog at DVCon U.S. 2023
Scientific Analog is coming to San Jose, CA! Grab this opportunity to meet our experts on verifying analog circuits in SystemVerilog & UVM.

Scientific Analog is coming to San Jose, CA! Grab this opportunity to meet our experts on verifying analog circuits in SystemVerilog & UVM.
Wondering how far the simulation has run? You can enable a progress display just with a mouse click.
This simple example demonstrates the pulling behavior of an ILO where the phase and frequency of the ILO exhibit beat notes instead of locking at constant values.
This primitive models an injection-locked oscillator with multiple injection inputs and multiple phase outputs.
Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More
Measuring Open-Loop Transfer Function of DC-DC Converter, Extracting Charge-Pump Converter Models, and More
XMODEL at DAC 2025, Modeling an Asynchronous SAR-ADC, and More
Modeling NAND Flash Memory, Measuring Comparator's Offset, and More
Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More