Upcoming Event
Meet Scientific Analog at DVCon U.S. 2023
Scientific Analog is coming to San Jose, CA! Grab this opportunity to meet our experts on verifying analog circuits in SystemVerilog & UVM.

Scientific Analog is coming to San Jose, CA! Grab this opportunity to meet our experts on verifying analog circuits in SystemVerilog & UVM.
Wondering how far the simulation has run? You can enable a progress display just with a mouse click.
This simple example demonstrates the pulling behavior of an ILO where the phase and frequency of the ILO exhibit beat notes instead of locking at constant values.
This primitive models an injection-locked oscillator with multiple injection inputs and multiple phase outputs.
Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More
Catching Elusive Voltage Spikes with Assertions, Modeling VCO with Extra Digital Inputs, and More
Modeling Delta-Sigma Digital-to-Analog Converters, XMODEL at DVCon US, and More
Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More
Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More