Harnessing the Power of UVM for AMS Verification with XMODEL
Don't miss the opportunity to join this 3-hour hands-on tutorial at DVCon US 2023 and learn how to write UVM testbenches for analog/mixed-signal circuits!
Don't miss the opportunity to join this 3-hour hands-on tutorial at DVCon US 2023 and learn how to write UVM testbenches for analog/mixed-signal circuits!
Want to simulate your high-speed transceiver model while gradually varying the frequency-dependent loss of the channel? Here is a simple tip on how.
Check out these two simple ways of modeling a track-and-hold circuit.
This primitive models a sample-and-hold circuit, sampling the input at the clock's triggering edge and holding it til the next edge.
UVM Testbench for LDOs, Modeling a Buffer with Variable Rise/Fall Delays, and More
XMODEL at DVCon US, Modeling D-PHY Transceivers, and More
Modeling a Buffer with Arbitrary Rising and Falling Transition Waveforms, and More
XMODEL at ASP-DAC 2024, Modeling Time-of-Flight Sensors, and More
Modeling a Thermal Sensor Circuit, Measuring the Transmitter Output Resistance, and More