Upcoming Event
Meet XMODEL at DAC 2022
Meet our experts in person and learn why XMODEL is the best way to verify analog circuits in SystemVerilog!
June 2022
Model of the Month
Modeling a duty-cycle corrector (DCC)
This application note models the duty-cycle corrector presented by James S. Humble, et al., in their 2006 ISSCC paper.
Tip of the Month
Recording the time instants of a clock waveform
Check out how to dump the time instants of the clock's transition edges into a text file for post-processing.
Primitive of the Month
meas_time
This primitive measures the time of each input event being triggered.
XMODEL Release Updates
XMODEL 2022.06
This release improves the XMODEL's stability of circuit-level simulation and the MODELZEN support for CDL-format netlists.
Latest Issues
September 2024
XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More
August 2024
Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More
July 2024
Webinar on Silicon Photonics Modeling & Simulation, Modeling Nonlinear PAM4 Transmitters, and More
June 2024
XMODEL at DAC 2024, Modeling an Adaptive DFE Receiver, and More
May 2024
Modeling a Phase Interpolator with INL/DNL, Using PSL Assertions for Analog Checks, and More