Webinar on Demand
UCIe PHY Modeling and Simulation with XMODEL
Missed this webinar? Watch the video recording and download the UCIe PHY model in SystemVerilog.
July 2023
Model of the Month
Modeling Charge Pump Circuits in NAND Flash Memories
This application note showcases three different ways of modeling a charge-pump voltage generator circuit.
Tip of the Month
Auto-extracting models with all the top-level ports as real types
With the new '--real' option of MODELZEN, it is handy to create SystemVerilog models of which top-level I/O ports are all real types.
Primitive of the Month
pwl_sel
With this primitive, you can model a nonlinear DC transfer function of a circuit which varies with a set of digital input values.
Latest Issues
September 2024
XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More
August 2024
Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More
July 2024
Webinar on Silicon Photonics Modeling & Simulation, Modeling Nonlinear PAM4 Transmitters, and More
June 2024
XMODEL at DAC 2024, Modeling an Adaptive DFE Receiver, and More
May 2024
Modeling a Phase Interpolator with INL/DNL, Using PSL Assertions for Analog Checks, and More