New Tutorial
GLISTER Online Interactive Demo
Want to introduce GLISTER to your friends? This online interactive demo is easy and fun!

Want to introduce GLISTER to your friends? This online interactive demo is easy and fun!
Check out this application note showcasing the model of a high-speed wireline receiver with CTLE/DFE equalization and half-rate bang-bang PLL-based CDR.
This primitive is the all time favorite, generating an xbit-type clock with optional sinusoidal jitter and random phase noise.
This release adds various improvements related to high-speed I/O modeling, such as the faster eye diagram plotting with XWAVE.
Modeling Delta-Sigma Digital-to-Analog Converters, XMODEL at DVCon US, and More
Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More
Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More
UVM Testbench for Verifying Adaptive DFE, Measuring the PLL's Open-Loop Transfer Function, and More
XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More