October 2019

TIP OF THE MONTH

Translating HSPICE or Spectre testbenches into XMODEL’s equivalent testbenches

Find out how MODELZEN converts your SPICE testbenches including .MEASURE and .VEC statements to SystemVerilog testbenches.

PRIMITIVE OF THE MONTH

These primitives are equivalent to a .IC statement in SPICE, which sets the initial condition of a node voltage or branch current.

MODEL OF THE MONTH

This example showcases how you can seamlessly combine the models for analog components and digital controller in SystemVerilog using XMODEL.

Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More

Measuring Open-Loop Transfer Function of DC-DC Converter, Extracting Charge-Pump Converter Models, and More

XMODEL at DAC 2025, Modeling an Asynchronous SAR-ADC, and More

Modeling NAND Flash Memory, Measuring Comparator's Offset, and More

Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More