Webinar on Demand
Automatic Generation of SystemVerilog Models from Analog/Mixed-Signal Circuits
Missed this webinar? Watch this video recording and gain insights on how to extract models from analog circuits.
Missed this webinar? Watch this video recording and gain insights on how to extract models from analog circuits.
The connect primitives with names ending in '_var' support variable conversion levels.
This primitive models an ideal digital-to-analog converter with arbitrary resolution.
Don't miss this opportunity to check out the latest updates on XMODEL, GLISTER, and MODELZEN face-to-face!
Checking the Settling of an Analog Signal, Handling Inherited Nets with Legacy SPICE Netlisters, and More
A UVM Testbench for Worst-Case Analysis Using Bayesian Optimization and More
XMODEL at DVCon Europe, Evaluating Transceivers with Multi-Drop Channels, and More
Modeling Variations in ReRAMs, Supporting RNM Nettypes, and More
Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More