Technical Paper
UVM testbench for verifying the global convergence of DFE adaptation loop
This UVM testbench checks whether a DFE adaptation loop always settles to the same final state regardless of the initial state.
October 2024
Tip of the Month
Measuring the open-loop transfer function and phase margin of a PLL
You can measure the open-loop transfer function of a PLL without breaking its feedback loop using a simplified Middlebrook method.
Primitive of the Month
probe_ac
With this primitive, you can measure the frequency-domain transfer function of your circuit/model while running a time-domain simulation in SystemVerilog.
Latest Issues
July 2025
Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More
June 2025
Measuring Open-Loop Transfer Function of DC-DC Converter, Extracting Charge-Pump Converter Models, and More
May 2025
XMODEL at DAC 2025, Modeling an Asynchronous SAR-ADC, and More
April 2025
Modeling NAND Flash Memory, Measuring Comparator's Offset, and More
March 2025
Silicon Photonics Simulation with XMODEL, Measuring I-V Curves, and More