February 2024

Upcoming Event

Scientific Analog is coming to San Jose, CA! Get up to speed with the latest techniques for verifying analog circuits in SystemVerilog & UVM.

This application note shows how to model the low-power (LP) and high-speed (HS) transceivers of MIPI D-PHY.

When measuring the frequency of a clock input, why does 'meas_freq' primitive produce twice its frequency value?

This primitive outputs the frequency of the input clock.

UVM Testbench for LDOs, Modeling a Buffer with Variable Rise/Fall Delays, and More

XMODEL at DVCon US, Modeling D-PHY Transceivers, and More

Modeling a Buffer with Arbitrary Rising and Falling Transition Waveforms, and More

XMODEL at ASP-DAC 2024, Modeling Time-of-Flight Sensors, and More

Modeling a Thermal Sensor Circuit, Measuring the Transmitter Output Resistance, and More