June 2021

Model of the Month

Modeling CMOS Image Sensors

This application note demonstrates how to model a CMOS image sensor with a 1920x1440 pixel array, published by Y. Nitta, et al. in ISSCC 2016.

Tip of the Month

Writing your own UDMs

Here is a list of tutorials and documentations that can help you get started with writing your own user-defined models (UDMs) and generating the functional models of your choice from circuits.

Q&A of the Month

The leakage in the 'switch' primitive

For numerical stability, XMODEL adds GMIN resistances to the nodes with no DC path, which may cause leakage in some of the off-state switches. Here is a tip on how to avoid it.

Upcoming Webinar

Writing OOP-style SystemVerilog testbenches for analog IPs

Missed this webinar on writing OOP-style SystemVerilog testbenches for analog/mixed-signal circuits? Here you can download the presentation slides and watch the video recordings.

Latest Issues

November 2025

Checking the Settling of an Analog Signal, Handling Inherited Nets with Legacy SPICE Netlisters, and More

October 2025

A UVM Testbench for Worst-Case Analysis Using Bayesian Optimization and More

September 2025

XMODEL at DVCon Europe, Evaluating Transceivers with Multi-Drop Channels, and More

August 2025

Modeling Variations in ReRAMs, Supporting RNM Nettypes, and More

July 2025

Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More