Tip of the Month
Using PSL assertions for analog circuit checks
Here is an example of a PSL assertion checking the supply current level during a power-down mode.
Here is an example of a PSL assertion checking the supply current level during a power-down mode.
Adding nonlinear characteristics to the existing phase interpolator model is super easy. Just add a 'pwl_func' primitive.
This primitive is useful when checking whether an xreal-type signal is below a certain threshold over a time interval.
This release introduces an advanced circuit partitioning algorithm with 'vsource' elements, enabling efficient supply current simulations of large circuits.
Meet Diana, Scientific Analog's AI Booth Specialist at DAC 2026!
Verifying NPUs with CIM, Optimizing Transmit Equalizers, and More
Estimating Eye Openings and FFE/DFE Settings from Channel SBR
Delay, Delay, Delay!
EQCHECK, Adaptive Decision-Feedback Equalizer, and More