Tip of the Month
Generating a sinusoidal signal with resettable phase
How do you generate a sinusoidal signal, of which phase can be reset by an external input? A 'sin_gen' primitive followed by a 'switch' primitive won't do it.

How do you generate a sinusoidal signal, of which phase can be reset by an external input? A 'sin_gen' primitive followed by a 'switch' primitive won't do it.
Here is a model of the gated ring oscillator (GRO) presented in the paper "A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping" by M. Z. Straayer and M. H. Perrott.
This primitive defines a piecewise-linear (PWL) function from an xreal-type input to an xreal-type output.
Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More
Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More
UVM Testbench for Verifying Adaptive DFE, Measuring the PLL's Open-Loop Transfer Function, and More
XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More
Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More