TIP OF THE MONTH
Translating HSPICE or Spectre testbenches into XMODEL’s equivalent testbenches
Find out how MODELZEN converts your SPICE testbenches including .MEASURE and .VEC statements to SystemVerilog testbenches.
October 2019
PRIMITIVE OF THE MONTH
vinit, iinit
These primitives are equivalent to a .IC statement in SPICE, which sets the initial condition of a node voltage or branch current.
MODEL OF THE MONTH
Digitally-Controlled Phase-Locked Loop (PLL)
This example showcases how you can seamlessly combine the models for analog components and digital controller in SystemVerilog using XMODEL.
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