September 2023

Model of the Month

Modeling a clocked comparator latch with reset, sampling, and regeneration behaviors

Can you model a regenerative amplifier with analog outputs performing reset, sampling, and regeneration? No, a transistor-level model doesn’t count.

Tip of the Month

Digital-to-analog converter (DAC) with finite settling time

Check out how to model a DAC showing a first- or second-order settling response with limits on its slew rate.

Primitive of the Month

ilimit

This primitive lets you set the maximum and minimum limits on the current that flows through a branch.

Latest Issues

October 2025

A UVM Testbench for Worst-Case Analysis Using Bayesian Optimization and More

September 2025

XMODEL at DVCon Europe, Evaluating Transceivers with Multi-Drop Channels, and More

August 2025

Modeling Variations in ReRAMs, Supporting RNM Nettypes, and More

July 2025

Analyzing the Power-Saving Benefits of DBI Encoding for High-Speed Transceivers and More

June 2025

Measuring Open-Loop Transfer Function of DC-DC Converter, Extracting Charge-Pump Converter Models, and More