February 17th, 2022
February 17th, 2022
Need to verify your chip in SystemVerilog, but can't because of the analog circuits in it? Please visit our virtual booth at DVCon U.S. 2022 and check out why XMODEL, GLISTER, and MODELZEN are the best way to verify analog circuits in SystemVerilog!
We also recommend attending Charles Dancak's presentation on how to write UVM testbenches for analog/mixed-signal circuits using XMODEL: A UVM SystemVerilog Testbench for Analog/Mixed-Signal Verification: A Digitally-Programmable Analog Filter Example
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October 11th, 2024
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December 14th, 2023