November 29th, 2022

Meet XMODEL at DVCon Europe 2022

Did you know using XMODEL is like ringing an analog bell of freedom on top of the digital fortress? Learn more on how to run analog simulation in SystemVerilog by clicking this link or visiting us!

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Latest Issues

January 28th, 2023

Scientific Analog Sponsors a Tutorial on Writing UVM Testbenches for AMS Circuits at DVCon US 2023

January 28th, 2023

Seoul National University Presents a UVM Reactive Testbench for Measuring Jitter Tolerance of High-Speed Wireline Receivers

January 25th, 2023

Founder of Scientific Analog Talks on the Art of Linear Analysis at ISSCC 2023

January 15th, 2023

Jaeha Kim Presents CMOS Image Sensor Modeling with XMODEL at ASP-DAC 2023

December 26th, 2022

Scientific Analog Wishes A Very Merry New Year to You!